I am a research scientist at
NVIDIA Research, working with the
computer architecture research group.
I have a broad research interest in hardware accelerator, HLS-based design flow, and ML/optimization-assisted compiler and CAD flow.
Previous, I earned my PhD in
Computer Science
at
UC Berkeley, under the supervision of Prof.
John Wawrzynek. During my PhD, I have worked on building efficient FPGA accelerators for emerging ML applications, HLS-based hardware/software flow, and ML-assisted HLS and CAD flow. My thesis focuses on novel design and scheduling techniques for accelerating machine learning algorithms on heterogeneous architecture. Prior to UC Berkeley, I received my B.A.Sc. from the University of Toronto, where I worked closely with the
LegUp research group.